A hardware implementation of discrete wavelet transform for compression of a natural image

Digital images can be represented in different forms/representations by using Image Transforms, which are simple or complex mathematical operations on the image. These transforms finds application in compression, enhancement, pattern recognition, and feature extraction etc. Discrete Wavelet Transform (DWT) is a widely used wavelet transformation. DWT transforms image from space domain to frequency domain, where the wavelets are discretely sampled. DWT has various advantages over other image transforms such as image can be represented in multi resolution form, avoids the division of image into non-overlapping blocks, blocking artifacts are avoided to achieve a high compression ratio, better identification of data suitable for human perception, provides better localization in spatial and frequency domain. DWT implemented on software [Matlab] usually has lower throughput, which is due to high overall design cycle time. This can be improved through hardware implementation of DWT. In this paper an effective high speed DWT architecture has been designed using Distributed Arithmetic (DA) concept. The designed architecture has been simulated and synthesized by using Verilog HDL for the selected device ZYNQZC706 (7z045ffg900-2). Our implementation is validated on a natural image of dimension 512∗512. This implementation reduces the overall design cycle time to 0.670 nanoseconds. © 2017 IEEE.